MOV

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Move (general purpose)

Intel AMD
+ +


Definition:

MOV DST, SRC

Replaces the value (contents) of the first operand (DST) with the value (contents) of the second operand (SRC) or, in another words, copies the contents of the second operand (SRC) to the first operand (DST)


Operation in pseudo code:

mov(r/mem/seg dst, imm/r/mem/seg src)
{
  #if sizeof(dst) != sizeof(src)
     #error both operands must have the same size (8/16/32/64)
  #endif
  #if dst is mem && src is mem
     #error both operands cannot be memory addresses
  #endif
  #if dst is imm
     #error destination cannot be a constant
  #endif
  #if dst is seg && src is seg
     #error both operands cannot be segment registers
  #endif

  if (dst == CS)
  {
     throw #UD; // invalid opcode exception 
  }
   
  if (dst is seg)
  {
     validate_segment(src);
  }

  if (dst == SS)
  {
     // disable all interrupts until the end of the next instruction execution (loading ESP)
  } 
 
  dst = src;
}


Opcodes (x86):

88 mod (xx) reg (xxx) r/m (xxx) MOV r/mem8, r8 -
89 mod (xx) reg (xxx) r/m (xxx) MOV r/mem16/32, r16/32 -
8a mod (xx) reg (xxx) r/m (xxx) MOV r8, r/mem8 -
8b mod (xx) reg (xxx) r/m (xxx) MOV r16/32, r/mem16/32 -
8c mod (xx) reg (xxx) r/m (xxx) MOV r/mem16, seg -
8e mod (xx) reg (xxx) r/m (xxx) MOV seg, r/mem16 -
a0 - MOV AL, offset8 AL := byte ptr seg:[offset8]
a1 - MOV (E)AX, offset16/32 (E)AX := (d)word ptr seg:[offset16/32]
a2 - MOV offset8, AL byte ptr seg:[offset8] := AL
a3 - MOV offset16/32, (E)AX (d)word ptr seg:[offset16/32] := (E)AX
b0 - MOV AL, imm8 -
b1 - MOV СL, imm8 -
b2 - MOV DL, imm8 -
b3 - MOV BL, imm8 -
b4 - MOV AH, imm8 -
b5 - MOV CH, imm8 -
b6 - MOV DH, imm8 -
b7 - MOV BH, imm8 -
b8 - MOV (E)AX, imm16/32 -
b9 - MOV (E)CX, imm16/32 -
ba - MOV (E)DX, imm16/32 -
bb - MOV (E)BX, imm16/32 -
bc - MOV (E)SP, imm16/32 -
bd - MOV (E)BP, imm16/32 -
be - MOV (E)SI, imm16/32 -
bf - MOV (E)DI, imm16/32 -
с6 mod (xx) reg (000) r/m (xxx), imm8 MOV r/mem8, imm8 -
с7 mod (xx) reg (000) r/m (xxx), imm16/32 MOV r/mem16/32, imm16/32 -


EFLAGS


:31

:30

:29

:28

:27

:26

:25

:24

:23

:22
ID
:21
VIP
:20
VIF
:19
AC
:18
VM
:17
RF
:16

:15
NT
:14
IOPL
:13:12
OF
:11
DF
:10
IF
:9
TF
:8
SF
:7
ZF
:6

:5
AF
:4

:3
PF
:2

:1
CF
:0
0000000000------0--------0-0-1-


Annotated WinDbg disassembly (x86):

8bff            mov     edi,edi ; 8b: opcode ff: mod=11 reg=111 EDI r/m=111 EDI 
8bec            mov     ebp,esp ; 8b: opcode ec: mod=11 reg=101 EBP r/m=100 ESP  
8bf8            mov     edi,eax
8945fc          mov     dword ptr [ebp-4],eax
8975e8          mov     dword ptr [ebp-18h],esi
b80b800000      mov     eax,800Bh
8b3da8120001    mov     edi,dword ptr [010012a8]
8bd8            mov     ebx,eax
a13c980001      mov     eax,dword ptr [0100983c]
8b45e8          mov     eax,dword ptr [ebp-18h]
8b483c          mov     ecx,dword ptr [eax+3Ch]
8a06            mov     al,byte ptr [esi]
8bf0            mov     esi,eax
8bc6            mov     eax,esi
c745fc01000000  mov     dword ptr [ebp-4],1 ; c7: opcode 45: mod=01 reg=000 r/m=101 [EBP+disp8] fc: -4 01000000: 1 (imm32)

Annotated WinDbg disassembly (x64):

48899d28050000     mov     qword ptr [rbp+528h],rbx
4889b530050000     mov     qword ptr [rbp+530h],rsi
4889bd38050000     mov     qword ptr [rbp+538h],rdi
4c89a508050000     mov     qword ptr [rbp+508h],r12
488b05b7b50200     mov     rax,qword ptr [00000000`78c11108]
488985f0040000     mov     qword ptr [rbp+4F0h],rax
65488b042530000000 mov     rax,qword ptr gs:[30h]
488bf1             mov     rsi,rcx
488988d0140000     mov     qword ptr [rax+14D0h],rcx
65488b042530000000 mov     rax,qword ptr gs:[30h]
48898808150000     mov     qword ptr [rax+1508h],rcx
8bf8               mov     edi,eax
448bc7             mov     r8d,edi
48c7c1ffffffff     mov     rcx,0FFFFFFFFFFFFFFFFh
488b8df0040000     mov     rcx,qword ptr [rbp+4F0h]
488b9d28050000     mov     rbx,qword ptr [rbp+528h]
488bb530050000     mov     rsi,qword ptr [rbp+530h]
488bbd38050000     mov     rdi,qword ptr [rbp+538h]
4c8ba508050000     mov     r12,qword ptr [rbp+508h]

Move to/from CRx (control registers)

Move to/from DRx (debug registers)

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